Semiconductors are used in integrated circuits for electronic applications, including radios, televisions, cell phones, and personal computing devices, as examples. One type of semiconductor device is a semiconductor storage device, such as a dynamic random access memory (DRAM) and flash memory, which use a charge to store information. In some semiconductor devices, magnetic materials are used, such as in Magnetic Random Access Memory (MRAM) devices. MRAM devices are increasing in popularity as storage devices because of their advantages of non-volatility, three dimensional cell packing capability, lower power consumption, and simpler and less expensive processing compared to conventional DRAM and nonvolatile flash memories, as examples. MRAM devices use the relative orientation of the magnetization in ferromagnetic materials to store information.
Magnetic material layers may be negatively affected by surface irregularities of underlying layers, which can be problematic in semiconductor processing. For example, the relative orientation and switching of magnetization may be corrupted by interfacial roughness, known as “Neel coupling”. Neel coupling is the reminiscent magnetism due to the roughness of the interfacial surface, as shown in FIGS. 1a and 1b. FIG. 1a illustrates a cross-sectional view of a semiconductor device having a first magnetic material layer 1, a non-magnetic material layer 2 disposed over the first magnetic material layer 1, and a second magnetic material layer 3 disposed over the non-magnetic material layer 2. FIG. 1b illustrates a more detailed view of the junction of the second magnetic material layer 3 with the underlying non-magnetic material layer 2. The arrow 4 represents the dominant magnetism direction of second magnetic material layer 3. The interface 5 of layers 3 and 2 is rough, as shown. Arrows 6 represent the reminiscent magnetism direction of underlying first magnetic material layer 1 (not shown in FIG. 1b).
Neel coupling becomes severe when an uneven or rough topography is propagated from the prior underlying material layers. This may be caused by a material such as copper that has a large, rough grain structure. Neel coupling deleteriously affects MRAM device performance and reliability.
Chemical-mechanical polishing (CMP) is a process that is frequently used to polish surfaces of semiconductor devices, for example, between material deposition steps. CMP is often used in damascene processes, in which holes and trenches are formed within a dielectric, and then filled with a conductor. Copper conductive lines are usually formed using a damascene process, because copper is difficult to etch. A subsequent CMP step removes excess copper from the top surface of the dielectric.
When a conventional CMP process is used, the edges of patterned features tend to have additional edge topography 11 as shown on the substrate 10 in FIG. 1c. Various features may be formed on the surface of substrate 10. These features may include protrusions 16 that extend above the surface 14 of the substrate 10. In other embodiments, the features may include trenches that extend below the surface of the substrate that may be subsequently filled with material, such as a conductive material.
Undesired edge topography 11 can result from the CMP step for forming features 16 which may comprise conductive lines (or of the materials that fill a trench, not shown). This edge topography 11 may adversely impact device performance, particularly with magnetic random access memory (MRAM) devices. The defects 11 in the edge topography create a surface irregularity, and may distort or cause pinning effects on the magnetic field of the domains of overlying ferromagnetic materials. Distortion and pinning results in undesirable magnetostatic fields. Also, additional edge topography 11 may introduce shorts through the thin magnetic tunneling junction when the magnetic stack is deposited over the edge topography.